Pipelining is a CPU technique that improves performance by dividing instruction execution into multiple stages (Fetch, Decode, Execute, Memory Access, Write Back) and processing multiple instructions simultaneously in different stages, allowing one instruction to complete every clock cycle after the pipeline is filled. Addressing modes determine how the CPU locates operands for instructions: Immediate (data in instruction), Register (data in register), Direct (address in instruction), and Indirect (address in register containing the actual address).
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Computer for JKSSB 2026: Computer Architecture Part 04 (L-08) | New Latest Pattern by Verma SirAdded:
Jai Hind friends. So today this is going to be our last lecture on Architecture of Computer. To understand this lecture better, you should watch all the previous lectures on Architecture of Computer. Read that first and then you can give this lecture. Otherwise you will not understand this lecture.
Because things have now started moving in chronological order. So if you want to understand it well, first listen to that lecture.
Then you come here.
If you are preparing for any exam of Jammu and Kashmir, be it JKP SI, JKP Constable, Naib Tehsildar, Finance Account Assistant. Even if any new advertisement comes, this computer series is going to be very good for you because in this we are reading things according to the latest pattern and according to the working.
So our topic today is going to be pipeline and address news. Now look, before understanding pipe lining, we should know one thing. What is that? That is our instruction cycle. Now we all know what an instruction is? If I tell you 2 + 3, what is three? There is instruction in it. Now we have to get this whole thing working. I have to get my entire edition done.
So this work has to be done on one instruction.
Now how does this work? It runs on a bicycle. First of all Bhai Saheb says that he does 'Fuch'. What does Fetch do? The work that needs to be done, the instruction that is there, what does the CPU do? Fuch does. Where does he do it from? I will tell you now. Will do the first one.
After doing Fetch, it will decode it to find out what the actual instruction given is? What work needs to be done on that? That will be decoded. After decoding, it will actually be used.
That execution will take place there. Now at the time of execution, sometimes we need data that we have to execute now but I need this data, then it will also pick up this data, access the memory, after that it will write back the result that comes, like if I say a + b friend, then the result of a + b, that result will be written back in the register or memory again. So this is what we call right back.
So, did you understand this instruction cycle? This means that for an entire instruction to complete, for an entire instruction to work, it has to run through the entire cycle.
First it will fetch, decode, execute, then access the memory, then write it back. This is when this whole cycle moves from here to here.
When it goes from here to here, then what becomes one task i.e. one instruction? It gets completed. Did you understand? Now friends, now fetch, decode, execute, access memory and write back. This is the work of different people. Meaning it is the work of different components.
Now those who have read the previous lectures will know because that is why I had said that without understanding the previous lectures, you will not be able to understand it, my friend. Now tell me one thing. To [ __ ]. Fetch the next instruction from the memory. Whose work was this? Was there any register work or not? Did you remember anything? Sir, whose work was this, ours? Our job was to be the program counter. Go read what the program counter said? It was the work of the program counter.
Absolutely. Well, who did the [ __ ]? To the next construction? The program counter did it.
Now who decodes it? So remember the CU control unit decodes it. The control unit sees what the actual work is to be done? And who does the actual work? Sir, now while working our ALU, if ALU needs data then it will either take the data from the cache or from the RAM.
We had also read this in cash mapping.
Now he will put it right back.
Where will the right back pay? Who will play right back? These also register. Right back.
Who does it? Only registers do the write back.
So you see, getting [ __ ] is someone else's job. Decoding is someone else's job.
Executing is someone else's job.
Accessing memory is someone else's job and writing it back is someone else's job. So, my friend, only when all of them do their respective work, an instruction gets completed.
So this is what he said.
What is a sequence? Fetch, decode, execute, memory access, write back, fetch again. Then when it reaches the next instruction, the work will be done on the next instruction.
Now imagine if by chance I tell you that brother we have three things a + b, let's change its colour. I do n't like the color, I like this one. If we have three jobs.
Suppose the first instruction says do a + b. The second instruction says do B + C and the third instruction says do C + A.
Now all this work is done inside the processor only. If yes, then look at it brother, all these things are inside the CPU only. The processing is done inside the CPU.
But there is a way for that too. So all this is happening inside the CPU. So now first of all let's see one thing.
What will happen first, sir? First of all, our first work will be completed in which fetch will happen first. Then after that the head will be decoded. Then it will execute.
Then the memory access will happen. Then there will be a right back. When this work is completed. When this work is completed then we will move on to other work. That means, when this is completely completed on B + C, then we will move on to the third task.
Then it will be complete. So this thing is being processed without pipeline.
This processing is being done without pipeline.
How This Works Without Pipelining?
How does this work without pipe lining? If non pop pipeline processor. Look, I am calling this thing pop pipe lining, pop lining.
Pipe lining, you can say pipe lining kind of thing, it is a technique. The technology is of the processor. What is a processor? This is the technique of CPU processor which does processing process.
We will also tell you how he does it. This is a technique.
But how do our non-pipelining processors work before this technique? Let's see. In a non-pipelined processor only one instruction is processed at a time.
We have just read that in this, first the Fetch D code will complete one instruction and then move on to the next one.
Then it will go to the third one. Now look here, the CPU completes all stages of the first instruction. First, he will complete all the stages of the instruction before starting the next instruction. Each instruction passes through the following stages. What are the stages? H Decode Execute memory access and write back. This is what I studied.
This work is not pipeline work.
What is this? The pipeline is not working. Now what is pipeline work? Which we also call pipe lining. Come if you speak.
Without pipelining, the CPU executes one complete instruction at a time before starting the next instruction. Correct. We have read this.
Now what is pipe lining? Let us first study pipe lining. Then I will explain it to you. It is said that pipelining is a technique used in the processor to improve performance. Well, pipelining is used to enhance performance. In pipelined instruction execution is divided into multiple stages. Multiple instructions are processed simultaneously in different stages. Now Sir, I am not able to understand what he is saying? Meaning, I am not able to understand anything. Look brother, now let me explain a basic thing to you. There is an instruction. An instruction.
Now an instruction will be fetched first.
Then what will he do? will decode. Hey, what happened? Then what will he do? will decode.
What will it do after decoding? It will execute on that. What will he do after execution? Memory access. If memory is needed, if memory access is needed, then it will access the memory, then what will it do, then it will write back, what will it do, it will write back, okay friend, it will take some time to do this thing, it will take some time to do this thing, it will take some time to do this thing, it will take some time to do this thing, it will take some time to do this thing, now the time taken in doing just this process is called clock cycle. Meaning, what do we call the time taken to complete a small task in instructions? Clock cycle. So this is clock cycle one, this is clock cycle two, this is clock cycle three, this is clock cycle four and this is clock cycle five. Meaning, what will he do in the first part of the clock cycle? It will do the trick. Then what will he do at another time? D coded, then execute in third, then memory access in fourth, write back in fifth, what do we call this, clock s, clock s, what happened, a small time period, now come here, no one should get scared after seeing this, no one should get scared after seeing this, I will explain this thing to you very interestingly, see brother, you leave this, you leave reading this, first come here, look here, all of you cast Arjun's gaze, all of you see brother, clock cycle, this clock cycle is running. Cycle one cycle two cycle three cycle four cycle five.
What is the first instruction in cycle one?
He got it flashed. He got it decoded in the second cycle.
What did he do in the third cycle? Execute it. Access memory in Forth.
And get it right back in the fifth.
Now what have we named them? Patch was IF'd. ID'd the decode. Changed Execute to EX. Memory changed to mm. WP to right back.
Ok? Now come here. We got this right back.
One clock cycle, this is the second clock cycle, this is the third clock cycle, this is the fourth clock cycle, this is the fifth, this is the sixth.
What did we do now? What did we do in pipeline? First of all, you are looking at this instruction one. Just follow the first instruction first. First instruction came to get the work done. So what did we do brother? Understand carefully. Do n't make notes for now. Just understand. When the first instruction came, we got it done first.
[ __ ] me now when the clock cycle was running.
Who needed to get the [ __ ] done? Sir, to get the Fuch done we needed a program counter.
We just read it. Then who got the second work done? Get your ID decoded. So who got it decoded? Sir, our control unit got it decoded.
Who executed it? ALU did it.
Who got the memory written back? Cash did it.
And who did the sorry memory access? Cash did it.
And who got the right back? Write back sir, register it. Friends, when the first instruction will be, what did we do in pipeline? Got this thing overlapped.
How? As soon as the first clock in instruction one is turned on, the first task is completed.
Now what is the second work?
Decoding it. So at this time this program counter is sitting idle. Vela is sitting, right? He is not doing anything now. So what did we do? As soon as he got it done, the first one started decoding the second one. We gave another task in Instruction Two. Whom? When this was our [ __ ] program counter time. We told you to work on other instructions. Ok? This is the same thing as it happens in a factory. There is an assembly line. If I explain it in a simpler way, then think brother, this is it.
We are making pizza. So what is going on here? The dough is being made. After the dough, we are applying sauce here. Now, everyone knows how to do this work. Here are the toppings and here is the oven. So, how will it work? Now it will not work like this that first the pizza is placed from here, then it will go here, then it will go here, then it will go here. Then we'll add the next pizza. No sir, when this pizza, this pizza will work here. There's going to be sauce here, so we'll start making two in the last one. Now when this pizza goes ahead, when the toppings start getting applied on this pizza, then sir, this one will come here to apply the sauce and then it will move ahead.
So in this way we will save time. So this is what is called pipelining in computer terms. So see brother, now here you have to see one thing, to get this work done, just look at instruction one, in how many clock cycles is instruction one getting completed, sir 1 2 3 4 5 what is the first instruction getting completed in five clock cycles, it is getting completed, it is getting completed, now just see in how many pipelines is the fifth instruction getting completed in its clock cycle, sir, in nine clock cycles, we are able to complete five instructions in nine clock cycles.
So we have increased this performance.
This is called pipe lining.
And this technique is to get the processor to work. So now you must have understood this.
What do we call this thing in its entirety? We will call it pipe lining. Did you understand or not? I will definitely come. Now come back.
Now you will understand. In pipelining instruction execution is divided into multiple stages. That's absolutely correct. It works on the principle of overlapping instruction execution. You must have understood this also.
We make the instructions overlapping. As soon as one's work was done, it was done.
Futch sent ahead.
We said the next instruction as 'fuch kar'. When he sent her forward, he asked the next one to move back.
Look, this is what we did.
When we delete it.
When the first instruction went from here to here, we added the second instruction. Now this will go from here to here, so we will send this one from here to here, the next instruction and we will not put it in here. So when it moves forward, then we will send it here in its place.
So it keeps moving forward. Ok? An assembly line is being formed. Come on brother, come back once again. Common Pipe Lining Stages R. Brother, the pipeline stages are also the same. Instruction cycles consist of fetch, decode, execute, memory access, and write back. While one instruction is executing another instruction can be decoded and a third execution can be fetched. That while one is being executed, what have we done to the other one? Decoded it.
And the third one was [ __ ] simultaneously. So that means three tasks are going on at one time.
Pipelining does not reduce the execution time of a single instruction.
Here it is very important to understand that every instruction, every instruction is taking five clock cycles.
Each instruction takes five clock cycles to complete.
Look how many clock cycles did it take from here to here? Five.
How many clocks does it take from here to here, sir? It looks like two to six or five. How much does it take from here to here? It looks like three to seven. How much does it cost? It looks like five. 1 2 3 4 5 means every instruction is taking its own time.
But collectively when we are taking five instructions then collectively the time is reducing because of pipeline processing. Ok? Come back.
This is what he said. Pipelining does not reduce the execution time of a single instruction but increases the number of instructions completed per unit of time.
You said it absolutely right. Now you understand what pipe lining is? Now friends, what are the advantages of pipeline? Increase CPU performance. That's absolutely correct.
Multiple instructions are processed simultaneously in different stages.
We just read about improved instruction through a much better utilization of resources. That's absolutely correct. Reduces idle time of processor unit. Absolutely right.
We reduce the ideal time. After the pipelining is completed, one instruction can complete in every clock cycle. That's absolutely correct. As it happens, the work will be done in the next clock cycle.
Look how he is speaking. The first instruction was completed in the fifth. Second in sixth, third in seventh, fourth in eighth, fifth in ninth, okay, this is what it is saying, improve overall system, this is absolutely correct, it is saying the same advantages, now it also has some disadvantages that this pipeline design is complex brother, brother, we have just seen how complex this thing is brother, this entire work is complex, now a lot of hardware is required to do this. And the third thing is pipeline hazard may occur during execution. Now what are these pipeline hazards? This also becomes important for us, my friend. What is it? What is not there? Ok?
Look, what is a pipeline hazard now?
Hazards are problems that stop the smooth flow of instruction in a pipeline. When the instructions running smoothly in the pipeline stop due to any reason, then it is called pipeline hazard because of the hazard the CPU may need to. Now, if any hazard arises for this and the smooth processing that is going on stops due to some reason, then what happens? So CPU has to wait.
Waiting for the pipeline or execute flows. And this delay is given another name, pipe lining stall. What is said?
This thing is called pipeline stall. Now there are different types of hazards in this also. The first one is called data hazard.
Now how does Data Hazard work? Let us assume that orders occur when one instruction depends on the result of another instruction. If our instructions are working, what will it depend on? On previous instruction.
And if there is a delay in that then there will be a delay in the next instruction also.
What is its example? Think. Imagine it. There are two workers in the restaurant. There is a worker who is making pizza. The other one is delivering it. Now the second one cannot deliver until the first one makes it. So the other one will have to wait.
And if there is weight, brother, what will happen?
Our pipe lining stall. And what is the pipeline stall called?
Hazard. And because we don't have the result of the previous instruction. That's why we are not able to move forward. We call this type of hazard data hazard.
Occurs when one instruction depends on the result of another instruction. Did you understand?
After this, control hazard occurs. Now what is a control hazard? It is necessary to read the branch instruction before reading from the control hazard. Think about what we read just a while ago.
What is going on? There is a symmetry going on that first instruction one will work, then two will work, then three will work, then four will work, then five will work. Why is this happening? Things are going smoothly.
Absolutely sir, things are going smoothly. But what happens when? Sometimes an instruction comes which changes the entire sequence. This smooth sequence of execution changes it. So because of this and this reason, instead of working on the next sequence, he starts working on the new sequence which comes separately from CP.
Look, read it. A branch instruction is an instruction that changes the normal sequence of a programming solution which is running normally, pipelining is going on, from there a different person comes up, then the instance of executing the next sequence will not work on the next sequence, what will it work on, the CPU which we just told you to work on this will start working on that which will be non-sequence, meaning a sequence of pipelining is running, now if a non-sequence instruction comes, then what does the CPU do, it leaves this and starts working on this. We call that branch instruction. What do we call that? It is called branch instruction.
What are you saying right now? Occurs because of branch and jump instructions. That's what I said, when does it happen? When the branch and jump comes, the instruction comes. So if this thing happens then brother, the pipeline which is running in sequence will slow down. And if there is a delay, then that is what is called a hazard. Do you say it or not? I say absolutely, sir.
In pipelining the CPU continuously fetches instructions in sequence.
But when a jump and branch instruction appear the processor must decide. Now if any new instruction comes here suddenly then the CPU gets confused there. He says, brother, should I continue in the sequence I am following or should I work on this new instruction that has come. So now whatever the CPU decides, what does the CPU do next? Starts working on the new one.
Ok? If the CPU decides to execute a new target instruction and it discards the old instruction, this entire process is called pipelining flush and the ET chief is called data control hazard. When the sequence stops working. This is a new instruction. Here comes Control Hazard. After control hazard, there is another type of hazard which we call structural hazard. Now what structural hazard does is that someone suddenly gets something else done. Occurs when multiple instructions need the same hardware resource simultaneously.
Look brother, look, look, understand. Suppose now let us assume that who does this D code deed? Decodes as Cu. Now some other component also does this with Cu.
Now if the CU has to work at two places at the same time, then there will be a problem. Then we will have problems. So this is what we call structural hazard. See what he is saying? Occurs when multiple instructions need the same hardware resource simultaneously. Now look here, instruction one wants memory access. Instruction one also needs to access memory at that time on that cycle, on the same clock cycle, and look at instruction two as well. What do both instruction one and instruction two need to do in the same clock cycle? Requires access to memory. Then there will be a problem, right? So this is where the problem will start. So this is what we call structural hazard. But only one memory unit exits. And only one memory will be able to do the work. So what will we call this? Structural Hazard.
What is its example? Two employees want to print documents at the same time but only one person can use the printer. I ca n't do both. So, whose example is this?
This is an example of structural hazard.
So, whatever we had, we have completed it till now. Is the pipeline completed?
We have completed the pipeline. Look brother, now we have addressing mode. Now what is addressing mode? It is important for us to understand this also. But before that I want to tell you one thing. Do you remember anything?
I had to teach you one thing.
What did we say when we read accumulator register AC register? What do these two people who come up with? Input operands arrive.
Remember? Input operands arrive. Now where do these operators go to us? It goes to ALU and the result of ALU is stored in the accumulator. Now this input is the input operator, what does it take? What do these input operands always raise? Pick up the data. Now where do they get this data from? So there are different places to pick them up.
Now before understanding this thing you should know about accumulator. Now look brother, what is the format of instructions like? There is one thing called operation and there is another thing which is either address or data. How sir? Look, this off code actually tells us what work needs to be done? For example, what is our offcode here? Offcode is that to add.
And here in the operator there will be address. Do you know the address? Those memory locations have different addresses. Like how much is there here? How much is this? 499 this is 500.
Any data can be present inside it.
This 501, this 502, 503 were taught. Do you remember anything? Absolutely. Now either the data will be directly present in it or the address will be present in it. Like what have you read here? The address is 500. And what is the data in 500? 25. So what do we say now when we combine this stuff? This refers to the formatting of instructions. Now what is an accumulator? We know this too.
Now what I told you is that actually from where can that data, that input operator, be collected.
will pick up from either memory location. Ok? Like we just saw, he will either pick it up from the register.
Ok? Or the data will be inside this instruction.
Then there is no need to go anywhere. The data will be inside that. Or he will pick it up from somewhere else.
Now what is addressing mode? Why was there a need for addressing modes? Come, let's read it.
Because CPU must know, CPU must know where the operator is located. Where is the operant coming from? Different method to locate operator.
What do we call the method used to locate the input operand? Let's talk about addressing modes. My friend. Did you understand? Now look here once.
These are all our different addressing modes. Now there are two types of addressing modes also.
One is non- computable addressing mode. Now non- computable addressing modes are those modes my friend in which the instruction itself contains the data. Ok?
Either the instruction will contain the data or the register will contain the data. What did we read earlier? Look once. Sir, in the operator you will either get the address or you will get the data directly.
If we get the address, we will go to that address and collect the data. And if the data is received directly then there is no need to go to the address. Meaning there is no need for memory again. So those which are non-computable, non-computable means in which no calculations etc. are taking place.
Where is the data operator located in it? Either in the instruction or in the register and where are the computables? Whose brother, the data is not in the instructions and rejector.
What do we get from it?
Effective address is obtained. And we have to calculate that. Ok?
What do we get in Operant? Only the address is available. Then what do we get by going to that address? Data is received.
So the first one is the immediate addressing mode. Now what happens in immediate addressing mode? The operand is a part of the instruction itself. what did you say? This is the complete instruction. This is offcode. And what is this? Our operant. Now look what has been given here in the operator? Just gave the data.
So is memory needed here? I didn't read it sir. So what will we call this? We will call it immediate addressing mode.
This is what he did. The Data 25 is available in the Instruction itself. No memory access is required. That's what I said. Did he say it or not? Now for those who are not able to understand this, give the first lecture.
Consider it an accumulator. The second is register addressing mode. Now that Bhai Saheb data is lying in the register.
Like see this, the operator is in register. Look brother, first of all our ad has come. See, offcode means what work has to be done and on whom has to be done the work? In R1.
So we got the data directly in R1.
Got the data. So what did we do?
Started working on it directly.
Now what are R1s? Remember these R1, R2, R3? There are general purpose registers. Do you remember or not? Remember? So he said the same thing. Ok? The data is in register one. No memory access. Memory access is also not required in this. There is no need. Now our competitors have arrived. Ok? Computable ones. How do these work? Come here.
Direct addressing mode. Look here brother. What has he done?
Entered the address directly into the operator. What is our offcode? Add. And what's in the operant? The number 500 is given as the address number 500 in the operator.
500 Look what is the instruction? Have to add and address given 500. So what will he do now? It will go into the memory and bring back the 25% data stored in the 500.
Okay, right? He will work on that. Then he will give the result to Tech to the letter. The address 500 is where the instruction operand is at the memory location. Ok? I've got it?
Where is the data lying? It is lying here. Now come here.
Register Indirect Addressing Mode: Let's see what happens here.
Now, the address of this operator of yours is in the register. Like opt code came add and after add R1 now going to R1 the data is not lying in R1. The address number is also located in R1. And when you go to the address, there are 25 data on number 500. So we will pick it up from here. A register containing the address of the operator. He keeps the operator's address with himself only. Ok? How does it work? Register R1 contains the address of the operand. The operant is that location memory location. Ok? Come forward.
Indirect addressing mode. What does he do now? Come here directly and tell me that brother, our ad code has come. 500 has arrived. The address will go into the address in 500. And there was no data there either. What is lying there too? The addressing number is given next. Now where will it go from here? Will go further.
25 will pick up the data lying on 1000 and bring it. This is called indirect addressing mode. So I hope you have understood this.
If I had just told you this thing that this happens, this happens.
You don't understand, you don't understand.
So friends, with this our architecture of computer ends.
Okay friends? Now the next topic will be our hardware.
Now for PDF brother you will have to go to the application.
Its PDF will be read tomorrow, it will not be read today because I have just got free and am late. Ok? So it may take time to upload its PDF. You will get its PDF tomorrow. Go to the app. The link is in the description. If there is any other problem then call on this number, sorry this number is 9622112300, call on this number. If you have any doubt, please ask. Thank you so much. I hope you enjoyed the lecture. If you like it then leave a comment and like it. So let's go, Jai Hind friends.
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