ASC 01 Problem

Added: 2026-05-26

[00:00:00]So welcome all for this digital system design module problems continuation.

[00:00:08]So first problem sequential circuit is described the following exitation and output function.

[00:00:18]So first draw the logic diagram of the circuit drive the transition table and the output map. So logic transition table output map.

[00:00:40]So output map is nothing similar to that of K.

[00:00:50]So express.

[00:01:04]So y= x1 x2 + x1 + x2 into y is the first equation is the equation number one y + so is also equal to that of y x1 x2 same x1 x2 and y three variables.

[00:01:44]So variable possibilities present state.

[00:01:59]Okay. Okay. First logic.

[00:02:12]So y1 x2 x1 x2 x1 same x1 x2 x1 x2 x1 x2 output Y X1 X2 Y.

[00:03:02]So logic diagram express the transition table output map. Okay.

[00:03:21]Possibilities possibilities x1 x2 y. So x1 x2 y ordering. So in the so 4 0 4 1 combination 0 0 1 1 0 0 1 1 0 1 01 combinations eight possibilities based upon that input variables. Sorry x1 x2 y.

[00:03:53]Okay.

[00:04:02]express.

[00:04:09]So present state x1 x2 x1 + x2 into y + = to x1 x2 + x1 + x2 into y. So express.

[00:05:03]So, x1 x2 x1 x2 x1 + x2 x1 + 0.

[00:05:18]Okay.

[00:05:23]1. So, 0 1 into 1. So 0 1 y + value 0 1 0 expression x1 into x2 + x1 uh x1 + x2 into y. So equation 0 1 0. So 0 into 1 + 0 + 1 into 0 anything 0.

[00:06:07]Okay.

[00:06:23]stable.

[00:06:28]Next value.

[00:06:45]So y + stable condition 1 unstable 0 0 stable 1 1 stable 0 stable 1 one stable 0 1 unstable one one stable stable unstable state output column output equal question Y.

[00:07:21]So Z is equal to what? Y.

[00:07:31]So 0 1 0ity.

[00:07:44]So column okay let the output equal to so the next state y + values will be represented at the output column then the output column and the unstable state will be denoted as a dash so unstable state so first table output map. So translation table three y x1 x2 x1 x2 y1 x2 different x2 0 1 0 1 0.

[00:09:08]So x1 x2 y 0 1 0 0 1 1 0 Okay.

[00:09:34]Okay. Output map. So output mapable condition already just for some revision again I have placed here. Thank you.