Ai- Based Physical design and chip design system

Added: 2026-05-11

[00:00:03]Hi, my name is Karnatakanar.

[00:00:06]I'm studying in sixth semester in Marwari University, ICT department. This is my friend Banuk Prasad. Hi, myself.

[00:00:13]My name is Banu Prasad. We are I am from IC department, Mar University. In my A subject, we we done project title is AI physical design and chip design system.

[00:00:29]Next uh our uh our project is about the VSSI. VLSI means a very large uh very very large scale integration. In that there there should be efficient like chip layout and it should be highly complex. It is a critical task. It should be number of components like a CPU and GPU and another memory units. It should be accelators and increasing in the uh optimizing placements for the routing and power and performance becoming significantly order. In this there there is a major in that traditionally electronic uh traditionally electronic design automation tools are there in that there is a uh there is an algorithm there should be performing a cheap floor planning routing. These methods are the struggle in the achieve optimal results and this is should be consumption consumption the power and the thermal distribution and balance the simulation and uh next our team will continue in my project we're using enforcement development and self alpha learning mission where traditionally using these methods are using in chip designing it is used as a machine learning and intellization optimization problem.

[00:01:44]Whereas the system continue improving the placementation and quality and we can enforcement learning by the combination of violence minimization and consumption control and clusters and we are efficiently use these scale chips without any manual interaction.

[00:02:02]In my project mainly we are taking as a multiple stage as in physical design including block placementation using RL based optimization or routing routing with multiple connections and typing uh analysis and power estimation and thermal heat and conjunction heat map and 3D view in and main objective is wire length minimizing the wire length and delay and reducing the wire uh routing conjunction and automatically generate the efficient chip out layout using a it is mainly we implemented the A technology in chip designing and BSI industry. Our main objective is to see the uh re industrial industrial life to bring to uh student level. Project demonstration functionality.

[00:05:57]Thank you.