University of Illinois researchers have developed a breakthrough in semiconductor manufacturing by stacking silicon chip circuits vertically in multiple layers with up to 100% yield, using low-temperature processing with ultra-thin silicon sheets made from standard single crystal silicon. This approach allows circuits to be built directly on top of other circuits without damaging the underlying layers, enabling memory cells that normally spread six transistors across one flat layer to be split vertically. This vertical architecture shrinks the chip footprint and shortens interconnect wires, offering a new path to extend Moore's Law beyond the physical and thermal limitations of traditional horizontal miniaturization.
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3D Silicon Chip Stacks Circuits Vertically to Extend Moore’s LawAdded:
University of Illinois researchers just stacked silicon chip circuits in multiple layers with up to 100% yield.
That matters because the old way to keep chips improving was making everything smaller and that path is running into physics and heat. Their breakthrough was low temperature processing with ultra-thin silicon sheets using standard single crystal silicon so they can build circuits directly on top of other circuits without cooking the layers underneath. One memory cell that normally spreads six transistors across one flat layer can be split vertically.
That shrinks the footprint and shortens the wires. The next leap in chips may come from going up, not smaller.
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